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IBM Assessment: Power Systems Virtualization Technical Support for AIX and Linux -v2 Sample Questions:

1. How can an administrator list all VIO server (VIOS) commands run by any user?

A) The ioslog command run as the root user.
B) The lsgcl command run as the padmin user.
C) The alog -t ios command run as the root user.
D) The history -t command run as the padmin user.

2. Certain configurations of Power 770 and Power 780 servers can be ordered with multiple IVE adapters. When designing a configuration to provide improved network availability what fact should be observed as a risk?

A) The same model of IVE must be ordered for each building block.
B) 1Gbps and 10Gbps adapters may not be aggregated into a single logical link.
C) An EtherChannel device created from adjacent IVE ports can result in broadcast storms.
D) IVE adapters do not support hot-plug operations.

3. Which of the following is required to support AME?

A) On-demand memory feature enabled
B) AIX LPARs
C) Virtual I/O Server
D) A maximum of 4GB of RAM per LPAR

4. A VIO server provides a virtual Fibre Channel adapter to each of 2 LPARs. The HBA has recently been replaced on the VIO server. After the VIO server was rebooted, the clients LPARs were also rebooted. The LUNs are now showing as "Defined" instead of "Available". What is the cause?

A) The client virtual Fibre Channel adapters were configured via DLPAR.
B) The HBA requires an initial configuration to be performed.
C) The client virtual Fibre Channel needs a map to the new WWPNs.
D) The HBA created new WWPNs on the virtual Fibre Channel adapters.

5. Which of the following statements regarding the implementation of Multiple Shared Processor Pools (MSPPs) is correct?

A) MSPPs allow processor capacity consumption to be restricted to a set of LPARs.
B) MSPPs allow for both IBM and third party applications to be licensed for a subset of physical processors.
C) MSPPs allow the restriction of transferring available processor cycles from one set of LPARs to another.
D) MSPPs allow for physical sets of processors to be reserved for specific sets of LPARs.

Solutions: